View MC2045-3_166337.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MC2045-3
Postamplifier for Applications to 200Mbps
FEATURES
q Low-cost IC, fabricated in advanced sub-micron q
BiCMOS process 1.5mV input sensitivity detect
www..com q Fully
DESCRIPTION
The MC2045-3 is an integrated, high gain limiting amplifier intended for fibre optic communication to 200Mbps. Normally placed following the photodetector & transimpedance amplifier, the post-amplifier provides the necessary gain to give PECL compatible logic outputs. The MC2045-3 also includes a programmable signallevel detector, allowing the user to set thresholds at which the logic outputs are enabled. The signal detect function has typically 2.25dB (optical) of hysteresis which prevents chatter at low input levels. A squelch function, which turns off the output when no signal is present, is provided by externally connecting the ST output to the JAM input.
q Wide range programmable input-signal level
differential design
q Supports 3.3V and 5V supplies q Available in TSSOP20, SOIC16 and QSOP16
package as well as die form
q Complimentary PECL data & signal detect logic
outputs
APPLICATIONS
q q q q
SDH/SONET/ATM Fast Ethernet FDDI ESCON
Part MC2045-3DIEWP MC2045-3WAFER MC2045-3S16 MC2045-3Q16 MC2045-3T20
ORDERING INFORMATION
Pin-Package Waffle pack Expanded Whole 8"on a 10" Grip Ring SOIC16 QSOP16 TSSOP20
CONNECTIONS
GndA VCC A CAZ+ CAZ
TOP LEVEL DIAGRAM
VSET2 VREF VCC E VCC E
SOIC16, QSOP16 Package
CA ZCA Z+ GndA DIN DIN VCC A CF JAM
1 2 3 4 5 6 7 8 16 15 14
TSSOP20 Package
VS E T VR E F V CCE DOUT DOUT GndE ST ST CA ZCA Z+ NC GndA DIN DIN V CCA CF NC VS E T
1 2 3 4 5 6 7 8 9 10 20 19 18 17
VR E F V CCE V CCE DOUT DOUT GndE GndE ST ST JAM
D IN
DOUT
Microcosm
MC2045-3 Date Code
13 12 11 10 9
Microcosm
MC2045-3 Date Code
16 15 14 13 12 11
D IN
DOUT
GndA
Level Detector
GndE
VCC A
CF
VSET
JAM
ST
ST
GndE
PRELIMINARY INFORMATION
PAGE -1-
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
PIN DESCRIPTION
Pin Name CAZCAZ+
www..com
16 SOIC Pin No. 1 2 3 4 5 6 7
20 TSSOP Pin No. 1 2 4 5 6 7 8 Auto-zero capacitor pin. Auto-zero capacitor pin.
Function
GNDA DIN DIN VCCA CF
Analogue section ground pin. Connect to most negative supply. Must be at same potential as GNDE Pin. Differential data input. Inverse differential data input. Analogue section power pin. Connect to most positive supply. Must be at the same potential as VCCE pin. Level-detect filter capacitor pin. Connect the capacitor between this pin and VCCA. PECL compatible input controlling output buffers (DOUT and DOUT pins). On chip pull-down defaults to low. Can be driven from CMOS. Logical inverse of ST Pin. May be connected to JAM Pin to enable automatic squelch function to operate. PECL output. Input signal-level status. This PECL output is LOW when the input signal is below the threshold set by the uses. Digital section ground pin. Connect to the most negative supply. Must be at the same potential as GNDA Pin. Logical inverse of DOUT Pin. JAM high forces DOUT high. In phase with DIN. PECL compatible diffential Data Output. JAM high forces DOUT low. In phase with DIN. Digital output section power pin. Connect to the most positive supply must be at same potential as VCCA pin. Connect to positive supply via resistor. Sets value of internal reference current. Input threshold-level setting circuit. Connect to VCC via a resistor.
JAM
8
11
ST ST GNDE DOUT DOUT VCCE VREF VSET
9 10 11 12 13 14 15 16
12 13 14, 15 16 17 18,19 20 10
PRELIMINARY INFORMATION
PAGE -2-
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
ABSOLUTE MAXIMUM RATINGS
Symbol VCC TA TSTG
www..com
Parameter Power supply (VCC-Gnd) Operating ambient Storage temperature
Rating 6 -40 to +85 -65 to +150
Units V C C
These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reliable operation at these extremes for any length of time is not implied.
DC CHARACTERISTICS
Symbol VIN VOS VN VTH VHYS IINJ ICC VOH VOL Parameter Input signal voltage Single-ended: Differential: Min. 0.5 1 2 1.85 -10 (2) (3)
Typ. 2.25 -
Max. 400 800 50 85 100 3.00 10 35 -0.88 -0.88 -1.62 -1.62
Units mVpp V V mVpp dB A mA V V
Effective input offset voltage Input RMS noise in 100MHz Input level detect programmability Level detect hysteresis (optical) JAM input current HIGH Supply current (no ECL loads) PECL(1) output HIGH PECL(1) output LOW
-1.025 -1.075 -1.81 -1.86
(2) (3)
(1) 50 to VCC -2V (2) 0 to +80C (3) -40C
AC CHARACTERISTICS
Symbol BW RIN CIN tPWD tR, tF Parameter Bandwidth: Gain >60dB Input resistance Input capacitance Pulse width distortion ECL out rise / falltimes (20-80% points)
PAGE -3-
Min. 100 -
Typ. 10 1.0
Max. 2 0.4 2.0
Units MHz k pF ns ns
MC2045-3_C
PRELIMINARY INFORMATION
MC2045-3
Postamplifier for Applications to 200Mbps
TYPICAL PERFORMANCE CURVES
Typical Signal Detect (5V)
250
Signal Detect Detail (5V)
25
200
20
Differential Input (mVpp)
5.0V Assert 5.0V De-assert
150
Differential Input (mVpp)
www..com
100
15
5V Assert 5V De-assert
10
50
5
0 0 5 10 15 20 25 30 35 40
0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
RSET (k)
RSET ( k )
Typical Signal Detect (3.3V)
250
Signal Detect Detail (3.3V)
25
200
20
Differential Input (mVpp)
3.3V Assert 3.3V De-assert
150
Differential Input (mVpp)
3.3V Assert 15 3.3V De-assert
100
10
50
5
0 0 5 10 15 20 25 30 35 40
0 1 1.5 2 2.5 3 3.5 RSET (kW) 4 4.5 5 5.5 6
RSET (k )
Signal Detect Assert Range (5V) (over process and temperature)
200 180 160
200 180 160
Signal Detect Assert Range (3.3V) (over process and temperature)
Differential Input ( mVpp ) Differential Input (mVpp)
Differential Input ( m V p p ) Differential Input (Vpp)
140 120 100 80 60 40 20 0 2 6 10
min (5v) max (5v)
min (3.3v)
140 120 100 80 60 40 20 0
max (3.3v)
14
18
22
26
30
2
6
10
14
18
22
26
30
Rset (k) Rset (K)
Rset (k) Rset (K)
Note: For all of these graphs RREF = 2k
PRELIMINARY INFORMATION
PAGE -4-
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
FUNCTIONAL BLOCK DIAGRAM
VCCA CF VCCE ST ST
Level Detector
JAM DIN
www..com
1st Stage
2nd Stage
DIN
10k 10k 10k 10k
Output Amp
D OUT DOUT C A Z+ CA ZVCCE
VSET VREF GndA
GndE
FUNCTIONAL DESCRIPTION
Input
The Data Input pins are internally DC biased at approximately VCC -1V. The MC2045-3 signals are AC coupled, using capacitors. These capacitors must be large enough to pass the lowest frequencies of interest (consecutive `1's or `0's) considering the input resistance. For example, at 155Mbps SONET, there is a maximum of 72 consecutive `1' s, which is is 465ns. To acheive the maximum allowed data dependant jitter, the low frequency cut-off needs to be lower by a factor of 10. However, it is better to set it at least one decade lower, due to the interaction of the time constants for the input stage and the DC restore circuitry, giving an input capacitor value of 2.2nF. thresholds operate. The data is then rectified and low-pass filtered before being compared with a reference voltage. The low-pass filter is controlled by CF, and 10nF will provide a nominal 2S time constant, thus avoiding false triggering due to variation in edge density of data. The comparator has the equivalent of 2.25dB (typ.) of optical hysteresis.
Squelch Function
The MC2045-3 provides for programmable input-signal level detection, and this may be used to automatically force the data outputs to a known state if the input signal falls below threshold using the JAM input. This is normally used to allow data to propagate only when the signal is above the users' BitError-Rate (BER) requirement. It therefore stops the data outputs toggling due to noise when no signal is present. In order to implement this function, ST should be connected to the JAM, thus forcing the data outputs to logical zero when the signal falls below threshold. Note that RSET and RREF must be connected, even if the Level-Detect function is not required.
DC Offset Compensation
An autozero circuit is included to remove the effects of DC offset. An external capacitor smoothes the feed back, acting with the internal 10k circuit resistance to pass the lowest frequencies of interest. At data rates between 125Mbps and 155 Mbps, this is normally set to 180pF.
Level detector
The input data is first amplified, with the level of amplification set by the ratio of RSET/RREF. This amplification level sets the level of input at which the status PRELIMINARY INFORMATION
PAGE -5-
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
TYPICAL APPLICATIONS CIRCUIT
V CC 22n 220pF RSET RREF VCC V CC InF
GndA
VA CC
CAZ +
CAZ -
VSET
V REF
VCC E
VCC E
www..com
DIN
22nF
D IN
DOUT
DOUT
C FILT DIN
22nF
D IN
DOUT
DOUT RPULLDOWN
GndA
Level Detector
GndE
VCCA
CF
VSET
JAM
ST
ST
GndE
22pF 510
510
ST V CC
APPLICATIONS INFORMATION
Setting Signal Detect
The MC2045-3 uses two external resistors to set the signal detect level Rref is set to 2k for all applications. Rset is chosen using the graphs on page -4-. The value is dependant on supply voltage and should be chosen for 3.3V or 5V operation. If 3.3V and 5V operation are to be supported inter-changeably set RSET based on the 3.3V graphs. The graphs also show the variation over process and temperature of the signal detect assert level. This, along with the minimum and maximum hysteresis are used to predict the usable sensitivity of the system. has the advantage that the resistance value is the same for 3.3V and 5V operation and it also has performance advantages at high data rates. The DC voltage must be within 5% of nominal and must be adequately de-coupled. This can be implemented using a parallel (Thevenin) resistance combination. The value of the pull-down and termination resistors can be selected from the tables below: 5V Supply
Thevenin Thevenin (RTOP) (RBOTTOM) 82 120 130 180
Impedance Pull-down Termination 50 75 270 390 100 150
PECL Termination
The outputs of the MC2045-3 are ECL100K and 300K compatible and any of the standard termination techniques can be used. The postamplifier PECL outputs often have to drive a transmission line. The most common method is to use pull-down resistors to VEE on the ECL outputs. This provides a DC current path for the ECL outputs in order to maintain the emitter follower outputs in the transistor's active region. A shunt resistor equal to twice the characteristic impedance across the differential outputs is used to terminate the transmission lines at the other end. Another termination technique is to terminate with a resistor equal to the characteristic impedance of the transmission line to a DC voltage of VCC - 2V. This PRELIMINARY INFORMATION PAGE -6-
3.3V Supply
Thevenin Thevenin (Top) (Bottom) 130 180 82 120
Impedance Pull-down Termination 50 75 150 220 100 150
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
APPLICATIONS INFORMATION
DC Coupled PECL Termination
VCC VCC PHY 2045-3
Power supply decoupling & optimising sensitivity
The MC2045-3 is not expected to require ferrite beads in order to give adequate performance. However, if optimum MC2045-3 sensitivity is required, the VCCA and GndA pins of the MC2045-3 should each be connected to their respective power rails via a ferrite suppressor, such as Murata BLM31A601SPT. Capacitors should be chosen with low effective series resistance, low dissipation factor and high Q. NPO or COG temperature characteristics are preferred because they provide more reliable performance over a wide range of environmental conditions. Small surface mount packages are recommended since they exhibit less parasitic inductance which can lower the overall effectiveness of the bypass capacitor at high frequencies. Filter capacitors should be placed close to the transceiver power and ground pins to minimise noise coupling which can occur between the filter and the transceiver.
www..com
DOUT DOUT
Z Z (Zx2) PECL
R Pull down
Thevenin PECL Termination
VCC 2 VCC 1
10nF
R
2045-3
Top
D OUT D OUT
Differences between die and packaged parts:
R
Bottom
VSET and V SET2 are alternative inputs to the same `Vset' function. Connect one or other, not both. There are 2 sets of VCCA and GndA on the left of the die. Only one pair need be connected, though no harm will result from both pairs being connected. On the TSSOP package, pairs of VCCE and GndE connections are connected.
PRELIMINARY INFORMATION
PAGE -7-
MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
BARE DIE INFORMATION
Chip Layout
GndA1
VCCA1
CAZ +
CAZ -
V SET
V REF
V CCE 2
V CCE 1
www..com
DI N
DOUT
DI N
DOUT
GndA2
Gd 2 nE
VCCA2
MC2045-3 Microcosm 1999
Gd 1 nE CF V SET JAM ST ST
Pad Size 85x85 m
Pad Centres
Description CAZCAZ+ VCCA1 GndA1 DIN DIN GndA2 VCCA2 CF VSET2 JAM X -56.8 -207 -356.9 -670 -670 -670 -670 -670 -451.4 -301.3 -151.2 Y 347.5 347.5 347.5 322.6 172.6 22.4 -127.6 -277.5 -347.5 -347.5 -347.5 Description ST ST GndE1 GndE2 DOUT DOUT VCCE1 VCCE2 VREF VSET X 15.8 166 670.8 670.8 670.8 670.8 670.8 436.9 243.4 93.2 Y -347.5 -347.5 -248 -103 50.1 200.3 347.5 347.5 347.5 347.5
Pad coordinates are in m, and are measured from the centre of the die to the centre of the pad. PRELIMINARY INFORMATION PAGE -8MC2045-3_C
MC2045-3
Postamplifier for Applications to 200Mbps
PACKAGE INFORMATION
20 Lead Thin Small Shrink Outline Package (TSSOP)
Dims Tols/Leads A A1 A2 D NOM. + .05 + .10 + .10 +.15/-.10 REF. REF. 6.50 6.40 4.40 .60 1.00 .325 MAX. 20L 1.20 .05 MIN/.10 MAX .90 7.80 24L Dims Tols/Leads e b c BASIC + .05 20L .65 .22 .13 MIN/.20 MAX + 4 MAX. MAX. MAX. MAX. 4 .10 .10 .05 .20 24L
e
aaa bbb ccc ddd
www..com
E E1 L L1 Z p
16 Lead Small Outline Package (SOIC)
Dims A A1 A2 D E E1 L ccc Tols/N MAX. + .05 + .10 + .10 + .20 + .10 + .05 MAX. 8 1.70 0.17 1.38 9.9 6.00 3.90 0.5 0.10 Dims ddd e b 0 01 R R1 + 4 MAX. TYP. Tols/N MAX. BASIC + .05 8 0.10 1.27 0.43 0~7 7 0.20 0.13
16 Lead Quarter Small Outline Package (QSOP)
Dims A A1 A2 D E E1 L
Tols/N MAX. + .05 + .10 + .10 + .20 + .10 + .05
16 1.60 0.1 1.40 4.9 6.00 3.90 0.6
Dims ccc ddd e b c R R1
Tols/N MAX. MAX. BASIC + .05 + .05 + .05 MIN.
16 0.10 0.10 0.65 0.25 .2 min .24 max 0.20 0.20
PRELIMINARY INFORMATION
PAGE -9-
MC2045-3_C
World Wide Sales Offices
Headquarters
Newport Beach
Mindspeed Technologies 4000 MacArthur Boulevard, East Tower Newport Beach, CA 92660 Phone: (949) 579-3000
Americas
US Southwest/Pacific Southwest
Newbury Park Phone: (805) 786-2000 Fax: (805) 480-4486
Europe
Europe Central Germany, Switzerland Eastern Europe and Turkey
Phone: (49) 89 829 1320 Fax: (49) 89 834 2734
US Northwest/Pacific Northwest
Santa Clara Phone: (408) 423-4500 Fax: (408) 249-7113
Europe Mediterranean Italy, Spain and Portugal
Phone: (39) 02 9317 9911 Fax: (39) 02 9317 9913
US North Central Illinois/Colorado
www..com
Phone: (630) 799-9300 Fax: (630) 799-9325
Europe North UK, Ireland and Scandinavia
Phone: 44 (0) 118 920 9500 Fax: 44 (0) 118 920 9595
US South Central - Texas
Phone: (972) 735-1540 Fax: (972) 407-0639
UK
Phone: 44 (0) 1925-661968 Fax: 44 (0) 1925-661800
US Northeast / Canada
Phone: (613) 271-2358 Fax: (613) 271-2359
Massachusetts
Phone: (978) 244-7680 Fax: (978) 244-6868
Europe South France, Belgium and Netherlands
Phone: +33 (0) 1 56 30 80 40 Fax: +33 (0) 1 56 30 80 20
US Southeast - North Carolina
Phone: (919) 858-9110 Fax: (919) 858-8669
Europe - Israel/Greece
Phone: (972) 9961-5100 Fax: (972) 9957 5166
US Florida / South America
Europe - Finland
Phone: (35) 892316 6495 Fax: (35) 892316 6220
www.mindspeed.com
Phone: (727) 799-8406 Fax: (727) 799-8306
US Mid-Atlantic - Pennsylvania
Phone: (215) 244-6784 Fax: (215) 244-9292
San diego
Phone: (858) 228 3000 Fax: (858) 228 3000
Santa Clara
Phone: (408) 423 4500 Fax: (408) 249 7133
Asia
Taiwan
Phone: (886-2) 8789-8366 Fax: (886-2) 8789-8366
China - Hong Kong
Phone: 86-755-518-2495 Fax: 86-755-518-3024
Hong Kong
Phone: 852-2-827-0181 Fax: 852-2-827-6488
China - Central and North
Phone: (86-21) 6350-5701 Fax: (86-21)-6350-5702
Korea
Phone: 82-2-565-2880 Fax: 82-2-528-4301
Mindspeed Technologies Japan Company Limited.
Phone: (81-3) 5380 1730 Fax: (81-3) 5371 1501
PRELIMINARY INFORMATION
PAGE -10-
MC2045-3_C

▲Up To Search▲

Price & Availability of MC2045-3

	To Download MC2045-3 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .